... package, while considering the filling time of the subsequent underfill encapsulation process. The design optimization approach was based on the latest regional segregation-based analytical filling time model. Numerical simulation was conducted to verify the governed analytical model. The discrepancies...

... the FEM modeling of fluid flow problem such as the underfill flow in encapsulation process [ 53 ]. e-mail:  aizatabas@usm.my 16 01 2021 22 03 2021 06 08 2021 electronic packaging flip-chip package's reliability underfill encapsulation void occurrent Recent rapid...

... In electronic packaging, flip-chip package is a microelectronic assembly, which consists of a silicon die whose inputs/outputs were connected to the substrate through an array of solder bumps [ 1 ]. To promote the package's reliability, underfill encapsulation process is carried out by dispensing epoxy resin...